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Most hardware description languages are oriented GRMI A amp towards simulation As high level synthesis systems mature a need arises for TAR 0 languages that aid not only in the simulation of hardware but also in its design OuDnced 0 as well f tsti ol By Di ri bution Availability Codes jA tiil and or rpist BS0cial Several criteria must be met by a language for hardware design they are
Copyright 1988,David C Ku and Giovanni De Micheli,HardwareC A Language for Hardware. David C Ku Giovanni De Micheli,Computer Systems Laboratory. Stanford University,Stanford CA 94305,1 Introduction. High Level synthesis is the transformation from a behavioral level specification. of hardware to a register transfer level description which may then be mapped. to a VLSI implementation The success of high level synthesis systems is heavily. dependent on how effectively the behavioral language captures the ideas of the. designer in a simple and understandable way This paper describes Hardware C. a behavioral hardware description language that is used by the HERCULES. High Level Synthesis system 1 2, The input to HERCULES consists of two sets of specifications a description. of the functionalityand a set of design constraints The functionality is described. in a C based language extended for hardware description called HardwareC The coP. design constraints specify the timing and resource limitations that are imposed Ns cTro. on a given design The HardwareC description is parsed and translated into. a parse tree abstraction called the behavioral intermediate form which is the. basis for behavioral synthesis Behavioral synthesis performs transformations. similar to those found in optimizing compilers Upon completion of behavioral. synthesis the optimized intermediate form is mapped to a register transfer level. implementation,2 Motivations, Many hardware description languages have been proposed and used in both For. academia and in industry Most hardware description languages are oriented GRMI. towards simulation As high level synthesis systems mature a need arises for TAR 0. languages that aid not only in the simulation of hardware but also in its design OuDnced 0. as well f tsti ol,Di ri bution,Availability Codes,jA tiil and or. rpist BS0cial, Several criteria must be met by a language for hardware design they are. described below,1 Surpports full spectrum of design styles. The language should support readily the varying spectrum of design styles. of the designer ranging from a pure behavioral description that is inde. pendent of the structural implementation to a mixture of behavior and. structure to a pure structural description of the interconnection and in. stantiation of hardware modules, This criterion is crucial in a design environment since very often the de. signer has a particular structure in mind when designing hardware This. partial structure should be captured by the language and reflected in. the results of synthesis A design often requires interfacing to an existing. hardware unit such as an ALU or incrementer The ability to interface. with external structure is of utmost importance in automated synthesis. Many synthesis systems and hardware description languages support only. a specific design style either pure structure or pure behavior We believe. a more efective approach to design is to use a flexible underlying language. that captures the essence of the design from the designer whether that. essence be behavioral or structural,2 Supports simulation. The language should support simulation in order to ascertain the correct. ness of a given description As designs become bigger and more complex. it becomes more important to be able to simulate at all levels of synthesis. from behavioral to structural to logic to gate level. 3 Simple to learu and use, The language is a tool that the designer uses to capture and transform. abstract ideas into complete designs The tool must therefore be simple. to learn and easy to use Specifically the language should contain the. most basic constructs that are needed to describe a design Details such. as timing and delay should be left out of the language. HardwareC attempts to satisfy the requirements stated above As its name. implies it is based somewhat on the C programming language However several. enhancements are made to increase the expressive power of the language as. well as to facilitate hardware description The major features of HardwareC are. described below, Notions of concurrent processes and message passing. Templates that allow a single description for a group of similar behavior. polymorphism For example an adder template describes all adders of. any given size, Instantiationof procedures similar to instantiating objects in object ori. ented languages and, Explicit Input Output commands that access the ports of a given model. HardwareC can be linked to the THOR simulation environment which is. also based on a C like simulation language 4,3 Modeling Hardware Behavior. Hardware behavior is modeled as a collection of concurrent and interacting pro. cesses Each process consists of a hierarchy of procedures and the processes. interact and synchronize with each other through the use of inter process com. municatzon mechanisms This model is appropriate since hardware modules are. allocated resources which continuously operate on a time varying set of inputs. A process upon completion will automatically restart execution with a new set. The concept of processes ai d inter process communication is powerful for. both hardware and software models In both domains it allows the designer to. 1 Specify the parallelism between interacting modules at a high level and. 2 Isolate the communication and synchronization points between the pro. cesses in an explicit manner, As an illustration of the use of processes and inter process communication. consider the Intel 8251 UART Figure 1 The UART is modeled as four concur. rently executing processes The main process accepts commands from the micro. processor and coordinates the execution of the other processes The transmitter. process writes data out on the serial interface and the two receiver processes. synchronous receiver and asynchronous receiver reads data from the serial in. terface Note that the execution of each process is independent with respect to. each other and is synchronized through the use of inter process communication. Inter process communication is discussed further in Section 12. HardwareC is a hardware description language for synchronous digital cir. cuits This is a reflection of the hardware model assumed by the HERCULES. Synthesis system Therefore there is the notion of a control state that is some. times used to describe the language A control state is defined as an interval of. time that corresponds to a system clock cycle in a synchronous system When. a particular operation is said to take one or more states it means that the ex. ecution of the operation requires one or more clock cycles to complete before. other operations that depend on it can begin, The HardwareC language is described in the sections that follow. I Hain Process I microprocessor,I Knit I I Synckcv I I Asynctcv I. Serial Interface,Figure 1 Hardware model for Intel 8251 UART. 4 Program Structure, In HardwareC there are two fundamental functional abstraction mechanisms. process and procedure A process consists of a hierarchy of procedures and. executes concurrently and independently with respect to the other processes in. the system Similarly a procedure is also a hierarchy of procedures However. a procedure executes whenever it is called by another procedure or process. The transfer of data to and from a process is accomplished through the. use of either parameters to the process or through message passing mechanisms. Section 12 The transfer of data to and from a procedure on the other hand is. accomplished solely through the use of parameters to the procedure Section 11. A procedure can neither return a value as the result of its invocation nor use. message passing to communicate with other procedures The major differences. between a process and a procedure are summarized below. a Process A process continuously operates on a time varying set of input. data Upon completion of the last statement in its body a process will. restart its execution operating on a possibly different set of inputs An. example of the definition of process procA is shown below Note the use. of the keyword process which prefixes the name of the process. process procA a b c,in boolean a,out boolean b,No recursive procedures are allowed. inout boolean c 2,body of process, e Procedure A procedure can either be combinational or sequential de. pending on whether the procedure requires any control states to execute. A sequential procedure begins execution whenever it is called by another. procedure Upon completion of execution a procedure places valid data on. its output ports and returns control to the calling routine For combina. tional procedures execution involves propagating the input data through. a network of combinational operations An example of the definition of. procedure procB is shown below,procB z y z,in boolean z. out boolean y,inout boolean 2,body of procedure, A procedure cannot be defined within the body of another procedure. This restriction follows the C language which disallows nested procedural. definitions The resulting flattening of the procedural definition is appro. priate since for hardware description it is more convenient and secure to. identify explicitly all inputs and outputs to a given procedure A proce. dure defined within the scope of another allows access to all variables that. are defined within the scope of its definition As a result a procedure s. boundary is not well defined if nested procedural definitions are allowed. Nested procedural definition is different from nested procedural invoca. tion the latter of which is both permitted and encouraged For example. invalid procedure valid procedure,definition definition. procA a b validproc x y,invalidproc x y,invalidproc. 4 1 Statement Block, Statement block more commonly known as compound statement is used to. group variable declarations and statements together so that they are syntac. tically equivalent to a single statement A statement can either be a variable. assignment an if then else statement a switch statement a while statement. a for statement an input output statement a message passing primitive or a. block Semi colons are used as terminators to statements A semicolon by itself. represents a null statement, HardwareCsupports two types of statement blocks parallelizable blocks. and serial blocks Parallelizable blocks are encapsulated using curly braces. and whereas serial blocks are encapsulated using square brackets and. The differences between the two types are, e Parallelizable Block The statements within a parallelizable block can. all execute in parallel subject to the data dependencies that exist between. the statements For example,variable declarations,statemenil. means that siaiementl can be executed concurrently with statement2 The. degree of parallelism is determined by the synthesis system. o Serial Block I The statements within a serial block are guaranteed to. execute in serial order starting from the first statement in the block For. example statementl will always execute before siatement2 regardless of. their data dependencies,variable declarations,statementl. statement2, Serial block allows the designer the ability to specify control dependencies. between otherwise data independent statements, A description written using only serial blocks is always guaranteed to be. correct that is the control dependencies between the statements are fully. described However the description may not be efficient since inter statement. parallelism is not exploited In order to specify such parallelism the designer. should use whenever possible parallelisable blocks in describing hardware. 4 2 Parameter Classes, The parameters to processes and procedures are categorized into three differ. ent classes in out and inout Input in parameters can only be referenced. within the body of a routine assignments to input parameters are illegal Out. put out parameters can be modified within the body of a routine references. to output parameters are illegal Input output inout parameters are bidirec. tional lines that can be either referenced or assigned The access protocol to. this bidirectional line is left to the designer and specified as part of the high. level description Note that an inou t parameter is not simply data that will. both be read and modified in the routine It is reserved for the description of. bidirectional lines, For example Busy is an in parameter that controls the access to an nout. parameter Data A lZero is an output parameter that returns a flag on whether. Data is all zero,process test Busy Data AllZero,in boolean Busy. inout boolean Data 81,ouwt boolean AllZero,while Busy. write to Data,Data newdata,write Data,AllZero Data 0. Notice the use of the serial block to ensure that the write to Data occurs. after the busy waiting while loop which does not have any data dependencies. with respect to the write,4 3 Declare Before Use, Whenever a procedure is called the arguments to the invocation are checked. for both compatibility in the variable size and type as well as for compatibility. in the parameter classification For instance an input parameter cannot be. used as the argument to a procedure call that requires an output parameter. Similarly an output parameter cannot be used as the argument to a procedure. call that requires an input parameter This compile time consistency checking. improves the security of the language, In order to provide this information to the parser it is necessary to declare. a procedure before it can be called The declaration of a procedure involves. specifying, 1 Name of the procedure can be any alphanumeric string beginning with. a character, 2 Number and order of parameters only Boolean parameters are allowed. 3 Sizes of the parameters the size of a parameter can be specified in terms. of a constant or an expression that evaluates to a constant. 4 Classes of the parameters in out or inout, An example of the declaration for a procedure is shown below. define MIX 4,declare example a b c,in boolean a,out boolean b MAX. inout boolean c MAX 1, The actual names of the parameters are irrelevant they are used only for. the purpose of specifying the classes and sizes of the corresponding parameters. Another example is shown below,declare sum z y z,in boolean x. out boolean y 2,inout boolean, If the declaration of sum is not supplied then the subsequent call in foo. will be invalid Similarly for inter process communication through message. passing it is necessary to predeclare a particular process before sending or. receiving messages from it The declaration for a process is exactly similar to. the declaration for a procedure with the sole exception of the keyword process. that prefixes the name For example the declaration for a process named foobar. is as follows,declare process fooba7i a b c,in boolean a 3. out boolean b 41,inout boolean c 2,5 Data in HardwareC. There are two types of data entities in the language constants and variables. They are described in the following sections,5 1 Constants. There are two types of constants in the language integer constants and hez. adectmal constants Integer constants are positive numbers described in the. decimal notation For example 5 and 223 are integer constants Hexadecimal. constants are numbers described in the hexadecimal notation They are pre. fixed by 0z followed by a string of hexadecimal digits 0 9 a b c d e f. For example 0zf represents 15 and 0z10 represents 16 Binary constants. are subsets of hexadecimal constants where I is represented as 0z1 and 0 is. represented as 0z0, Negative constants are not represented in the language This restriction. stems from the independence of HardwareC to a particular style of complemen. tation Therefore if the designer wishes to specify 3 in one s complement. notation then he should specify the bit wise representation of the value using. hexadecimal constants For an 8 bit number in one s complement notation 3. is represented as 0zf8,5 2 Variables, There are two variable types in the language Boolean and integer Boolean. variables are mapped to wires or registers in the final hardware whereas integer. variables are provided for the convenience of the description and will be resolved. at compile time during behavioral synthesis, A variable may be declared within any block or of any arbitrary. nesting The semantic follows that of block structured languages where a vari. able is visible only within the scope of its definition A variable with the same. name at a deeper nesting block level will override any current definition of the. For instance all declarations in the following example are valid. int i new integer,boolean x y,y is not defined here. No global variables are allowed in HardwareC This restriction is due to the. fact that global variables allow side effects that are not explicitly identified. This is undesirable from the standpoint of security verifiability and program. readability If some data must be shared between two routines then the data. should be explicitly specified as common parameters to the two routines. Integer Integer variables can only be scalar quantities Integer variables may. be used in any arithmetic Boolean and relational expressions They can also. be used as indices to constant iteration loops for loop and as indices for. accessing components of Boolean vectors and matrices The following example. demonstrates the use of integer variables and expressions in accessing compo. nents of a Boolean vector,swaps the two nibbles in a to b. in boolean a 8J,out boolean b 8,copies LSB nibble to b a. for i 0 to k do,bE i 4 i 4 I a i i 1,does exactly the same thing. bE i 4 j 4 I a i j J,copies MSB nibble to b s,bE i j I a i 4 j 4 1. The exact syntax on accessing components of a Boolean vector is discussed. in the next section The example below shows the use of integer expressions. and values in control structures,boolean vec E24,for i 0 to 7 do. vec 3 i 3 i 2 I Ox7 binary Ilil,ved 3 i 3 i 2 I i,vec should have the following value. 111 110 101 100 Oil 010 001 111, Boolean A Boolean variable represents one or more signals where each bit of. the variable corresponds to a signal that can be either 0 or 1 Boolean variables. can be scalar vector or matrix For example the following declarations are all. valid Boolean variables In particular a is a scalar b is a vector of five elements. starting from index 0 and c is a matrix of 25 elements with the rows starting. from 0 to 4 and columns starting from 0 to 4,boolean a scalar. boolean b 53 vector,boolean c S 53 matrix, In Boolean vectors specifying the variable name without brackets or with. empty brackets represent the entire vector For example b and b D are equiv. alent to b 0 4 Columns of a Boolean matrix can be accessed similarly For. example c 2 and c 2 D are equivalent to c 2 C0 4 Since assignments to. matrices are not permitted a reference to c will automatically be converted to. c 03 0 4 the first row of the matrix, For Boolean vectors and matrices it is also possible to access a subrange of. values This is specified by the colon notation For example b 2 3 repre. sents a vector of two values that corresponds to the third and fourth element. of b The most significant bit MSB is always the higher index with the least. significant bit LSB being the smaller index, Integer variables and expressions can be used in variable declarations to. specify the dimensions of the variable or they can be used to access components. and subranges of Boolean variables For example,c i i i 1 b O 1. boolean q i l q has 4 elements, Boolean variables are further classified as local static and register. boolean Local Boolean variables are the default A local boolean is. initialized to zero and its value is not saved across procedure invocations. For example,boolean flag,boolean vectorflag 2 matrixflag 2 3. static Static Boolean variables are similar to local Boolean variables. with the semantic difference that their values are retained across proce. dural invocations For example,static inteornal state 12. Static variables will always be implemented with storage elements such as. register Register Boolean variables are architected registers that are. specified by the designer Similar to static variables they also retain. their values across procedural invocations Every assignment to a register. variable immediately loads the corresponding register with a new value. For example,register status 8, The difference between register and static variables is in how assign. ments are handled which is discussed next, Assignments to boolean and static variables are resolved during behavioral. synthesis and hence do not require any control states for run time execution. In contrast each assignment to a register variable corresponds to the loading. of the register with a new value and hence requires a control state at run time. To demonstrate the differences between static and register variables consider. the two examples below In procedure foo each assignment to the static. variable c will not consume a control state at run time This is due to the fact. that the assignment only changes subsequent references to c and hence does. not imply loading the register that implements c with a new value. c 1 change reference only a,c 0 change reference only. c 1 I change reference only,c 0 last value of c is 0 a. Similarly the register variable c in procedure bar also has a final value. of 0 The difference is that during the execution of bar the register is loaded. with 4 values corresponding to each assignment to the variable Therefore the. procedure requires four control states to execute,register c.